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FET Devices

Post CMOS Theory and Applications
Edited by P. Suveetha Dhanaselvam, Naima Guenifi, Shiromani Balmukund Rahi, and J. Ajayan
Copyright: 2026   |   Expected Pub Date: 2026
ISBN: 9781394311418  |  Hardcover  |  
418 pages
Price: $225 USD
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One Line Description
Master the More-Moore paradigm and the cutting-edge material innovations redefining the limits of semiconductor miniaturization with this essential roadmap to the future of global microelectronics fabrication.

Audience
Academics, researchers, and industry professionals working in ferroelectric engineering and technology, gate engineering, nanotechnology, microelectronics, and material science.

Description
In todays rapidly evolving electronics landscape, the relentless pursuit of miniaturization stands as a fundamental objective. This drive fuels substantial investments in semiconductor fabrication facilities worldwide. This book serves as a concise, comprehensive guide to semiconductor device miniaturization. It delves into a wide spectrum of topics, including characteristics, innovative materials, structural modifications, and advancements in semiconductor devices. It meticulously traces the evolution of semiconductor devices, shedding light on both existing and proposed technologies, while emphasizing the significance of Moores Law and the More-Moore paradigm. This compendium provides a holistic view of recent developments, incorporating discussions on cutting-edge research and innovative concepts in the field of miniaturized semiconductor devices and their practical applications.

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Author / Editor Details
P. Suveetha Dhanaselvam, PhD is an Associate Professor in the Department of Electronics and Communication at the Velammal College of Engineering and Technology with more than 19 years of teaching experience. She has authored two books, published papers in 24 reputed journals and 53 international conferences, and holds one patent. Her research interests include analytical modeling, simulation, and oxides.

Naima Guenifi is and Assistant Professor at the University of Batna 2. She has more than 25 publications in international journals of repute. Her research focuses on characterization techniques for Tunnel FETs and optimization techniques involving genetic algorithms and neural networks.

Shiromani Balmukund Rahi, PhD is an Assistant Professor in the School of Information and Communication Technology at Gautam Buddha University. He has published 26 research papers, three conference proceedings, 30 book chapters, and seven books. His research interests include nanofabrication, quantum mechanics, and material characterization.

J. Ajayan, PhD is a Professor in the Department of Electronics and Communication Engineering at Sri Rajeshwara University. He has published more than 150 research articles in various journals and international conferences, six books, more than 20 book chapters, and three patents. His areas of interest include microelectronics, semiconductor devices, nanotechnology, RF-integrated circuits, and photovoltaics.

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Table of Contents
Preface
Acknowledgment
1. Junctionless Multigate Field Effect Transistor

R. Ouchen, T. Berghout, F. Djeffal and H. Ferhati
1.1 Introduction
1.2 From Single-Gate to Multigate FETs
1.2.1 The Era of Single-Gate FETs
1.2.2 Double-Gate Devices
1.2.2.1 Planar DG-FET
1.2.2.2 Vertical DG FET
1.2.3 Multigate Structures
1.2.3.1 Fin Field-Effect Transistor
1.2.3.2 Tri-Gate FET
1.2.3.3 GAA FETs
1.2.3.4 Surround-Gate Transistor
1.2.3.5 Omega-Gate FET
1.2.3.6 Pi-Gate FET
1.3 Junctionless Multigate FETs
1.3.1 Junctionless Transistors Design
1.3.2 Basic Principle of Junctionless Transistors
1.3.3 Evolution to Junctionless Multigate FETs
1.3.4 Advantages of Junctionless Multigate FET
1.3.5 Challenges and Limitations
1.3.6 Junctionless GAA FET Numerical Simulations
1.4 Machine Learning-Assisted Design of Junctionless GAA FET
1.5 Conclusion
References
2. Heterojunction Field Effect Transistor
Shahnaz Kossar, Asif Rasool, R. Amiruddin, Syed Abbas Ali, Mohammad Ayaz Ahmad, Nasharath Mapjan, Kasim Sakran Abass and Mir Waqas Alam
2.1 Introduction
2.2 Basic History and Challenges
2.2.1 Overview of Transistor Technology
2.3 Heterojunction-Based Field-Effect Transistors
2.3.1 Principles of Heterojunctions
2.3.2 Types of Heterojunction
2.3.2.1 Type I Heterojunction
2.3.2.2 Type II Heterojunction
2.3.2.3 Type III Heterojunction
2.4 Selection of Material for HFETs
2.4.1 Band Structure in HFETs
2.4.2 Effect of Band Gap on Device Performance
2.4.3 Formation of 2DEG Features
2.4.4 Mechanisms for 2DEG Formation
2.4.5 Implications for HFET Operation
2.5 Conclusion
References
3. Nanosheet Field Effect Transistor
P. Suveetha Dhanaselvam, B. Karthikeyan, K. Kavitha, S. Nagarajan, P. Karthikeyan and G. Pradeep Kumar
3.1 Introduction to Nanosheet FETs
3.2 Structural Innovations in Nanosheet FETs
3.3 Fabrication Techniques for Nanosheet FETs
3.4 Performance Advantages of Nanosheet FETs
3.5 Challenges in Nanosheet FET Development
3.6 Applications of Nanosheet FETs
3.7 Conclusion
References
4. Post CMOS Semiconductor Field Effect Transistor
Vishnudevi N., Thenmozhi T., Vijay M. and P. Suveetha Dhanaselvam
4.1 Introduction
4.1.1 Overview of Semiconductor Devices
4.1.2 Historical Background
4.2 CMOS Technology
4.2.1 Historical Background
4.2.2 Principles of CMOS Technology
4.3 Advancements in Semiconductor Devices
4.3.1 Thermal Transistors
4.3.2 Advanced Materials
4.3.3 3D Integrated Circuits
4.3.4 Technological Trends
4.3.4.1 Integration of Artificial Intelligence (AI)
4.3.4.2 Internet of Things (IoT)
4.3.4.3 5G Technology
4.3.5 Manufacturing Techniques
4.3.5.1 Advanced Packaging
4.3.5.2 In-House Chip Design
4.3.5.3 Sustainable Manufacturing
4.4 Applications of Semiconductor Devices
4.4.1 Consumer Electronics
4.4.2 Digital Applications
4.4.3 Analog Applications
4.4.4 Mixed Signal Applications
4.4.5 Power Management Applications
4.4.6 Automobile Sector
4.4.7 Healthcare
4.5 Future Directions
4.5.1 Research Trends in CMOS Technology
4.5.2 Potential for New Applications
4.5.3 Environmental Impact and Sustainability
4.6 Conclusion
References
5. Underlapped MOSFETs and Its Characteristics
P. Suveetha Dhanaselvam, B. Karthikeyan, K. Kavitha and G. Pradeep Kumar
5.1 Introduction
5.2 Structure
5.2.1 Analytical Model
5.3 Results and Discussions
5.3.1 Surface Potential
5.3.2 Electric Field
5.4 Conclusion
References
6. Fundamental of Carbon Nanowires and its Applications
N. Nagarani, P. Suveetha Dhanaselvam and B. Karthikeyan
6.1 Introduction
6.1.1 The Nanotech Revolution: Carbon Leads the Charge
6.1.2 Carbon Nanowires: The Next Big Thing in Nano
6.2 Properties of Carbon Nanowires
6.2.1 Exceptional Thermal Conductivity
6.2.2 Steelier Than Steel: Exceptional Mechanical Strength
6.2.3 Chemical Stability of CNWs toward Fire
6.2.4 Electric Excellence: Conductivity at the Nanoscale
6.2.5 Quantum Leap: Nanoscale Magic of CNWs
6.3 Fabrication Techniques
6.3.1 Chemical Vapor Deposition
6.3.2 Laser Precision: Ablation and CNW Formation
6.3.3 Electrochemical Approaches to CNWs
6.4 Applications of Carbon Nanowires
6.4.1 Smart Circuits: CNWs in Nanoelectronics
6.5 Ongoing Research and Future Perspectives
6.5.1 Quantum Computing, Aerospace Applications, and Photonics
6.5.2 Next-Generation Photonic Devices and Wearable Technology
6.5.3 Neuromorphic Computing and Green Energy Solutions
6.6 Case Study: Hardware Accelerators Based on CNWS
6.6.1 Carbon Nanotube Transistors and Hardware Accelerators
6.6.2 CNT-Based Hardware Accelerator Operation Mechanism
6.6.3 Advantages of CNT-Based Hardware Accelerators
6.6.4 Challenges in CNT Hardware Accelerator
6.6.5 Future Prospect
6.7 Conclusion
References
7. Junctionless Transistor
S. Manikandan, M. Karthigai Pandian and A. Srinivasan
7.1 Introduction
7.1.1 Key Characteristics of Junctionless FETs
7.1.2 Fundamental Principles of Junctionless FETs
7.2 Junctionless FET Structures
7.2.1 Planar Junctionless FET
7.2.2 Nanowire Junctionless FET
7.2.3 Double-Gate Junctionless FET
7.2.4 Surrounding Gate (Cylindrical) JLFET
7.2.5 Double-Material Gate JLFET
7.2.6 Triple-Gate and Gate-All-Around JLFET
7.3 Modeling of Junctionless Fet
7.3.1 Analytical Modeling
7.3.2 Charge Model
7.3.3 Drain Current Model
7.3.4 Linear Region Drain Current
7.3.5 Drain Current in Saturation Region
7.3.6 Characteristics of Junctionless FET
7.4 Challenges and Design Considerations in JLFET Fabrication
7.4.1 Doping Control and Uniformity
7.4.2 Gate Control and Electrostatic Integrity
7.4.3 Material Selection for Gate and Channel
7.4.4 Oxide Quality and Thickness Control
7.4.5 Process Integration with CMOS Technology
References
8. Field-Effect Transistor-Based Biosensors in Medical Field: Principles and Material Innovations
Shivangi Srivastava and Sajal Agarwal
8.1 Introduction
8.2 Working Principle of Bio-FET
8.3 Distinct VOCs Related to Diseases and Its Human Body Origins
8.4 Nanomaterials Used for Sensing VOCs
8.5 Conclusion
References
9. Wearable Device Analysis and Applications
Sarin Vijay Mythry
9.1 Introduction
9.2 Methodology
9.3 Simulation Result
9.4 Conclusion
References
10. Perovskites: Pioneering the Next Generation of Semiconductor Technologies
P. Suveetha Dhanaselvam, B. Karthikeyan, S. Nagarajan, K. Kavitha, P. Karthikeyan and G. Pradeep Kumar
10.1 Introduction
10.2 The Science of Perovskites
10.2.1 Crystal Structure and Composition
10.2.2 Electronic and Optical Properties
10.2.3 Stability and Defect Tolerance
10.2.4 Defect Tolerance
10.3 Advantages of Perovskites over Traditional Semiconductors
10.4 Applications of Perovskites in Semiconductor Technologies
10.5 Conclusion
References
11. Performance Analysis of Eco‑Friendly Perovskite Solar Cells
P. Suveetha Dhanaselvam, B. Karthikeyan, K. Kavitha and G. Pradeep Kumar
11.1 Introduction
11.2 Materials and Methodology
11.3 Performance Analysis
11.4 Conclusion
References
12. Real Time Myocardial Infarction Detection and Localization Using an Advanced VLSI System
Janani V.G., Suveetha Dhanaselavm P., Vasuki S. and Muneeswari B.
12.1 Introduction
12.1.1 Importance of Early Myocardial Infarction Detection
12.1.2 Motivation for VLSI-Based Solution
12.1.3 Role of Electrocardiograms (ECGS) in Cardio Vascular Diagnostics
12.2 Background and Literature Review
12.2.1 Myocardial Infarction: Causes, Symptoms and Consequences
12.2.2 Diagnostic Approaches for Myocardial Infarction
12.2.3 VLSI in Medical Application
12.3 Proposed VLSI Architecture
12.3.1 Design Objectives
12.3.2 System Overview
12.3.3 Classification Methodology
12.3.4 Implementation Overview
12.4 Performance Analysis
12.4.1 Evaluation Metrics
12.4.2 Experimental Results
12.4.3 Comparison with Existing Systems
12.5 Applications and Practical Deployment
12.5.1 Integration into Medical Devices
12.5.2 Impact on Patient Outcomes
12.5.3 Future Directions
12.6 Conclusion
References
13. Tunnel Field Effect Transistors and its Application as Label-Free Biosensor
Basudha Dewan
13.1 Introduction
13.1.1 New Approaches for Upcoming Technology Generations
13.1.2 Tunnel Field-Effect Transistors (Tunnel FETs): A Vital Technique toward Power Harvesting
13.2 Tunnel FET Technology: State of Art
13.3 Band-to-Band Tunneling (BTBT) Current
13.3.1 Reported Work
13.4 Device Architecture and Simulation Deck
13.5 Results and Discussion
13.6 Conclusion
Bibliography
14. Graphene Nanosheet Field Effect Transistor
S. Raj Kumar, S. Murugan and T. Esther
14.1 Introduction
14.2 Device Structures and Simulations
14.3 Analytical Modeling
14.3.1 Boundary Conditions
14.3.2 Channel Potential Model
14.3.3 Electric Field Model
14.3.4 Model of Threshold Voltage
14.3.5 Drain Current Model
14.3.6 Transconductance
14.3.7 Integrated Noise
14.4 Result and Discussion
14.5 Conclusion
Bibliography
15. Design and Performance Analysis of 10 T and 28 T Full Adder Using MOSFET and FinFET
Varsha Jayaprakash, Boggarapu Lokesh, Aishwarya K. and B. Lakshmi
15.1 Introduction
15.2 Materials and Methods
15.2.1 28 T CMOS Full Adder
15.2.2 10 T GDI CMOS Full Adder
15.2.3 28 T FinFET Full Adder
15.2.4 10 T GDI FinFET Full Adder
15.2.5 Simulation Methodology
15.3 Results and Discussion
15.4 Conclusions
References
16. Investigations of Vital Design Parameters of a Low-Power Amplifying Unit for EEG and Advanced Neuroscience Research
Sarin Vijay Mythry, Shashi Kant Gupta and Sai Kiran O.
16.1 Introduction
16.2 Methodology
16.3 Circuit Design and Description
16.4 Design Specifications
16.5 Simulation and Results
16.6 Output Waveforms
16.7 Conclusion
References
17. Heterojunction Tunnel FET with Graphene Nanoribbon
Ritam Dutta and J. Ajayan
17.1 Introduction
17.2 Simulation Strategy and Calibration
17.3 Results and Discussion
References
18. Hybrid Field Effect Transistor
K. Kavitha, P. Suveetha Dhanaselvam, B. Karthikeyan, S. Nagarajan, G. Pradeep Kumar and P. Karthikeyan
18.1 Introduction
18.2 Ferroelectric FETs (FeFETs)
18.3 Tunnel Field-Effect Transistors
18.3.1 Kane’s Model
18.3.2 Tunneling Current Model
18.4 Junctionless FETs
18.5 Concept of Hybrid FET Architecture
18.6 Conclusion
References
About the Editors
Index


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